FPGA solution 업체 - Ethernet keyword
FPGA solution 업체 - Ethernet keyword
Enclustra (https://www.enclustra.com/en/home/)
Mars AX3
https://www.enclustra.com/en/products/fpga-modules/mars-ax3/
The Mars AX3 FPGA module is equipped with a powerful, low-cost Xilinx Artix-7™ 28nm FPGA, Gigabit Ethernet, and fast DDR3 SDRAM, making it perfectly suited for high-speed communication and DSP applications.
opsero (https://opsero.com/)
Ethernet FMC - Maximum Effective Throughput
http://ethernetfmc.com/performance-benchmarks/
trenz-electronic (https://www.trenz-electronic.de/de/)
Dual fast Ethernet Artix Module with Xilinx Artix-7 35T
The Trenz Electronic TE0710-02-35-2IF is an industrial-grade FPGA module integrating a Xilinx Artix-7 35T FPGA, dual 100 MBit Ethernet transceivers, 512 MByte DDR3 SDRAM with 8-bit width, 32 MByte Flash memory for configuration and operation, and powerful switch-mode power supplies for all on-board voltages. A large number of configurable I/O's is provided via rugged high-speed stacking strips.
All this on a tiny footprint, smaller than a credit card, at the most competitive price. Modules in 4 x 5 cm form factor are fully mechanically and largely electrically compatible among each other.
All parts are at least industrial temperature range of -40°C to +85°C. The module operating temperature range depends on customer design and cooling solution. Please contact us for options.
Orange Tree Technologies Ltd (http://www.orangetreetech.com/)
ZestET2-J Ethernet FPGA Board
http://www.orangetreetech.com/products/gigabit-ethernet-boards/zestet2-j
The ZestET2-J is an easy to use FPGA board with Xilinx Artix-7 user programmable FPGA and a very high performance TCP/IP Offload Engine (TOE) chip. The board can be used as a programmable interface to external devices, for high speed processing of streaming data, and for data acquisition and control.
It provides a simple bridge between a high speed computer network and a programmable digital interface. The TOE sustains a data rate over 100MBytes/s in each direction and includes a user programmable CPU for optional higher level protocols.
